AMD and Samsung deepen AI chip collaboration

Samsung Electronics and Advanced Micro Devices (AMD) have signed a memorandum of understanding to expand their strategic collaboration on next-generation artificial intelligence memory and computing technologies.

The agreement, announced on March 18 and signed at Samsung’s Pyeongtaek chip manufacturing complex in Korea, formalizes deeper cooperation as demand for AI infrastructure grows.

AMD Chair and CEO Lisa Su and Samsung Vice Chairman and CEO Young Hyun Jun attended the signing ceremony, underscoring the importance of the partnership for both companies.

Under the MoU, Samsung and AMD will align on primary supply of Samsung’s next-generation high-bandwidth memory, HBM4, for AMD’s upcoming Instinct MI455X AI accelerators.

Samsung said its HBM4, described as the first in the industry to enter mass production, is built on a sixth-generation 10-nanometer-class DRAM process and a 4-nanometer logic base die.

The HBM4 product offers processing speeds of up to 13 gigabits per second and bandwidth of up to 3.3 terabytes per second, which Samsung said exceeds industry standards and targets AI training and inference workloads.

Samsung has already been a primary HBM supplier to AMD, providing HBM3E for AMD’s current Instinct MI350X and MI355X accelerators, and will position itself as a key HBM4 supplier for AMD’s next-generation AI GPUs.

The agreement also covers co-development of advanced DDR5 memory optimized for AMD’s sixth-generation EPYC processors, codenamed “Venice.”

These DRAM and DDR5 solutions are intended to support next-generation AI systems that combine AMD Instinct GPUs, 6th Gen EPYC CPUs and rack-scale architectures such as the AMD Helios platform.

Samsung and AMD said they are closely collaborating on advanced memory technologies for AI and data center workloads as memory bandwidth and power efficiency become more critical to system-level performance.

Beyond memory, the MoU includes discussions on a potential foundry partnership under which Samsung could provide contract chip manufacturing services for AMD’s next-generation products.

Samsung highlighted its capabilities in cutting-edge foundry and advanced packaging, presenting itself as able to deliver turnkey solutions that support AMD’s evolving AI roadmap.

Analysts noted that talks between AMD and Samsung on foundry services and high-bandwidth memory supply point to possible changes in AMD’s supply chain and manufacturing partnerships in advanced semiconductors.

Lisa Su’s trip to Korea, her first since becoming AMD CEO in 2014, included visits to Samsung’s advanced chip facilities and meetings with senior executives to discuss collaboration.

The Samsung–AMD tie-up was announced in the same week as Nvidia’s (NVDA) developer conference, where Nvidia (NVDA) disclosed its own foundry partnership with Samsung and praised Samsung’s HBM4 chips.

Reuters reported that Samsung holds about a 22% share of the global HBM market, behind market leader SK Hynix’s 57%, and is seeking to narrow the gap as AI-driven demand tightens HBM supply.

The expanded collaboration comes as AMD has lined up large multi-year GPU deployments with customers such as Meta Platforms (META) and OpenAI for AI workloads.

Last month AMD said it had agreed to sell up to $60 billion worth of AI chips to Meta (META) over five years, allowing Meta (META) to purchase as much as 10% of the chips, and AMD signed a similar deal with OpenAI last year.

Commentary from Simply Wall St noted that additional memory and manufacturing options from Samsung could give AMD more flexibility in handling order volumes, product roadmaps and potential supply disruptions.

During the same visit to Korea, Su met Naver CEO Choi Soo-yeon at Naver’s headquarters, where AMD and Naver signed an MoU to build a more integrated AI ecosystem.

Naver and AMD plan to strengthen technical cooperation to develop a high-performance GPU computing environment optimized for Naver’s hyperscale AI model HyperClova X.

The two companies also intend to support academic research by providing AI computing resources and launching joint research initiatives across diverse infrastructure environments.